Thursday 13 March 2025
Scientists have made a significant breakthrough in developing a new type of delay-locked loop (DLL) that can operate at extremely high frequencies and maintain low power consumption. This achievement has far-reaching implications for the development of advanced computing systems, where speed and efficiency are critical.
The DLL is a crucial component in modern computer systems, responsible for generating clock signals that synchronize data transfer between different parts of the system. In traditional DLLs, the delay-locked loop is controlled by an analog circuit, which can be prone to errors and require frequent adjustments. The new DLL design, on the other hand, uses a digital signal processing approach, making it more accurate and efficient.
The researchers developed a mixed-mode delay-locked loop (MM-DLL) that combines the benefits of both analog and digital techniques. The MM-DLL features a binary search locking scheme, which allows it to quickly find the optimal delay value for each clock cycle. This reduces the locking time by up to 10 times compared to traditional DLLs.
Another key feature of the MM-DLL is its ability to detect and recover from clock failure conditions. This is particularly important in high-frequency systems where a single error can lead to data corruption or system crashes. The MM-DLL’s toggle detector circuit monitors clock activity and adjusts the digital-to-analog converter (DAC) code as needed, ensuring that the clock signal remains stable.
The new DLL design has been fabricated using a 3-nanometer FinFET CMOS process and has demonstrated impressive performance figures. It achieved a locking time of under 10.5 nanoseconds, while consuming only 5.4 milliwatts from a 0.75-volt supply at a frequency of 4.26 gigahertz. The MM-DLL also showed excellent jitter performance, with a root-mean-square (RMS) jitter of just 1.2 picoseconds.
The implications of this breakthrough are significant for the development of advanced computing systems. With its ability to operate at extremely high frequencies and maintain low power consumption, the MM-DLL is well-suited for use in future generations of processors, memory interfaces, and other system components. The technology also has potential applications in fields such as artificial intelligence, machine learning, and data analytics, where high-speed processing and low-power operation are critical.
The researchers’ achievement is a testament to the power of innovative thinking and collaboration in the field of computer science.
Cite this article: “Breakthrough in Delay-Locked Loop Technology Enables High-Speed, Low-Power Computing”, The Science Archive, 2025.
Delay-Locked Loop, Mixed-Mode, Digital Signal Processing, Clock Signals, High-Frequency Systems, Low Power Consumption, Binary Search Locking, Toggle Detector Circuit, Finfet Cmos Process, Advanced Computing Systems
